1. Field of the Invention
The present invention relates to a charged particle beam and method of using same; and more specifically, to an electron beam exposing mask and apparatus which enable, when exposing a plurality of patterns having different details but a similar overall shape, the exposing of patterns with the least number of mask patterns.
2. Related Art
With the rapid development in high density integration of LSI, charged particle exposure methods are replacing conventional photolithography. Such charged particle methods include, for example, electron beam and X-ray. FIG. 1 schematically illustrates a conventional electron beam exposing apparatus. In FIG. 1, reference numeral 1 denotes an electron gun; reference numeral 2 denotes an electron beam; reference numerals 3, 4, 5 denote mask plates; reference numerals 6, 7 denote electrostatic deflectors; reference numeral 8 denotes an electromagnetic deflector; reference numeral 9 denotes a wafer. The square permeable patterns (slit) 3A, 4A, 5A are respectively formed on the mask plates 3, 4, 5. The permeable patterns 3A and 4A have sides that coincide; and the permeable pattern 5A has a side oriented at 45.degree. with respect to the sides of the permeable patterns 3A, 4A.
In the FIG. 1 electron beam apparatus, the permeable patterns 3A, 4A, 5A are aligned to overlay each other. These patterns shape a section of an electron beam 2 by deflecting the electron beam 2 with electrostatic deflectors 6, 7 and electromagnetic deflector 8. The electron beam 2 initially has a square shape as it passes through the permeable pattern 3A. It is then given a rectangular shape as it passes through the permeable pattern 4A. The electron beam 2 is then given a trapezoidal shape as it passes through the permeable pattern 5A.
An advantage of the FIG. 1 apparatus is that it has a throughput that is higher than that of a so-called point beam system electron beam exposure apparatus. This is because it is possible to form a variable trapezoidal shape, a variable triangle shape and a variable rectangular shape. However, repetitive basic patterns, such as a semiconductor memory (e.g., DRAM or SRAM) cannot be easily formed with such electron beam exposing apparatus. This is because it is impossible to expose such repeated patterns with single exposure. Therefore, high throughput cannot always be attained because the repetitive pattern must be formed by a sequence of a rectangular and/or triangle patterns.
The FIG. 2 apparatus has been proposed to improve such throughput problems. In FIG. 2, reference numeral 11 denotes an electron gun; reference numeral 12 denotes an electron beam; reference numeral 13 denotes a mask plate (rectangular shaping aperture); reference numeral 14 denotes an electromagnetic lens; reference numeral 15 denotes a block pattern selection reflector for selecting a block pattern explained later; reference numeral 16 denotes a stencil mask; reference numeral 17 denotes a reduction lens system; reference numeral 18 denotes a wafer. The stencil mask 16 has various permeable patterns, so-called block patterns 20 (also called mask patterns) on a substrate 19 of the stencil mask 16. FIG. 3 is a plan view of an example of the block pattern 20.
The FIG. 2 electron beam apparatus can expose a single basic pattern by repeatedly using, at a high frequency, the stencil mask 16. However, since the size of the, stencil mask 16 is limited, a number of block patterns 20 on the stencil mask 16 is also restricted. Therefore, a large number of block patterns cannot be provided on the stencil mask 16.
As a means for solving this problem, it has been proposed to increase the number of types of patterns by using a plurality of stencil masks and interchanging these masks. But, the interchange of block mask requires a considerable time; and thereby, high throughput cannot be attained.
Word line and bit line patterns connected to a memory cell and logic circuit wiring patterns also appear repeatedly within a memory chip. Therefore, a block, exposure system has been employed in order to improve the efficiency of exposing such patterns. FIG. 2 shows only one of a plurality of such patterns provided on the stencil mask 16 (beam passing mask). To expose such patterns, the desired one of the patterns is selected and this selected pattern is irradiated with a rectangular electron beam that is shaped by the mask plate 13.
However, wiring patterns of an LSI including wiring pattern for bypassing obstructions such as contact holes and transistors requires a variety of bending wiring block patterns. Moreover, in the case a staircase power supply wiring pattern, many different staircase block patterns are required.
As a result, block patterns for bending wiring patterns and block patterns for a staircase power supply wiring patterns can occupy a large part of a sheet of stencil mask. This limits the kinds of other block patterns. In addition, the block patterns for bending wiring patterns is less frequently used in comparison with the block patterns for other wirings such as word lines. This increases the time to expose a desired pattern and reduces the throughput.
In FIG. 4(a), the straight portions of wirings L1, L3 are exposed by selecting the block pattern B14 (refer to FIG. 5 on stencil mask 16 and then irradiating it with the rectangular shape electron beam 2. The bending portion of wiring L2 is exposed by selecting the block pattern B11 (refer to FIG. 5) on stencil mask 16 and then irradiating it with the rectangular shape electron beam 2. Similarly, in the FIGS. 4(b), 4(c), the bending portion of wiring L2 is exposed by selecting the block patterns B12 and B13 (refer to FIG. 5) of stencil mask 16 and then irradiating it with the rectangular electron beam 2. The block patterns B11 through B13 are composite patterns of the L type bending pattern and the clank type bending pattern.
The four kinds of block patterns B11 through B14 are restricted in length and width and are used to expose the three bending patterns shown in FIGS. 4(a) through 4(c). These wiring patterns typically occur in word lines and bit lines and in exclusive OR gate circuits. These patterns occur because wiring must bypass obstructions such as contract holes and transistors. Such patterns must be kept parallel and at equal intervals.
FIGS. 6(a) and 6(b) show staircase power supply wiring pattern diagrams that illustrate a problem of existing exposure systems. In FIG. 6(a), the staircase power supply wiring pattern 9 is exposed by selecting a block pattern B15 (refer to FIG. 7) of stencil mask 16 and irradiating it with a rectangular shape electron beam 2. The parallel line portion L4 of the power supply wiring pattern 9 is exposed by selecting a block pattern B17 (refer to FIG. 7) of stencil mask 16 and irradiating it with a rectangular shape electron beam 2. In the same way, in FIG. 6(b), the mirror pattern portion 9' is exposed by selecting a block pattern B16 (refer to FIG. 7) of stencil mask 16 and irradiating it with the rectangular shape electron beam 2. Thus, three kinds of block, patterns B15 through B17 are required to expose the power supply wiring patterns shown in FIGS. 6(a) and 6(b). Such a staircase power supply wiring pattern is used, for example, at a point for connecting upper and lower layers of multilayer wiring.
FIG. 8 shows a wiring pattern that illustrate another problem of existing exposure systems. In FIG. 8(a), the parallel portion L5 is long. The L type bending block patterns B18 through B20 are used for the bending portions L6, L7 and L8 of the wiring pattern. But, as explained above, the bending block patterns B11 through B14, b17 through B20 and the staircase block patterns B15 and B16 occupy a large area of the stencil mask 16. This prevents a variety of block patterns from being formed on the stencil mask 16. As a result, increased time is needed to select block patterns. This prevents high speed exposure.
In addition, the wiring patterns for an address decoder and for logic gate circuits of a memory cell comprise repetitive patterns. In these circuits, the contact hole positions vary in a fixed fashion. Therefore, different block patterns must be provided on the stencil mask 16 (beam passing mask) for each of the different contact hole positions.
Accordingly, many block patterns are required for logic gate circuits and address decoders. These patterns occupy a large area of the stencil mask 16. Thus other needed block patterns cannot fit on the stencil mask 16. As a result, increased time is needed to select block patterns. This prevents high speed exposure. For example, to form the pattern shown in FIG. 10(a), various block patterns B21 through B26 must be provided on the stencil mask 16 as shown in FIG. 10(b). This gives rise to a number of problems as noted below.
1. Formation of the FIG. 10(a) pattern requires many block patterns such as B21 through B26. Namely, formation of first and second address decoder contact hole groups L11 and L13 requires use of block pattern B21 of stencil mask 16. This pattern is then irradiated with a rectangular electron beam.
2. For example, after an exposing area on a wafer is moved through deflection processing via the rectangular electron beam 2, the exposing area is irradiated with the rectangular electron beam 2 through the block pattern B21. Formation of the third contact hole group L15 requires selection of a block pattern B22 of stencil mask 16. This pattern is then irradiated with a rectangular electron beam 2. Thereafter, the electron beam 2 after passing through the pattern B22 is deflected to expose the pattern B22 to predetermined exposure area on the wafer. The block patterns B24 through B26 are sequentially selected and irradiated with the rectangular electron beam 2. Lastly, formation of the linear patterns L12 and L14 requires selection of the block pattern B23 of stencil mask 16. This pattern is then irradiated with the rectangular electron beam 2.
As explained above, exposure of logic gate circuit patterns such as an address decorder requires that the stencil mask include a plurality of block patterns B21 through B26. Thereby, the number of block patterns formed on the block mask for other exposure patterns is restricted.
3. A long time is required to select a desired block pattern; thus, preventing high speed exposure. Namely, when forming the pattern of the FIG. 10(a) address decoder, a longer time is needed to select block pattern B21 to expose the first and second contact hole groups L11, L13; and to sequentially select block patterns B24 through B26 to expose the third contact hole group L15. More particularly, a longer time is required for comparison and collation of exposure data D and block pattern data defining the stencil mask 16 and for positioning the stencil mask 16.
4. If electron beam exposure is to use a stencil mask with block patterns, then when the design of an LSI circuit is changed the shape of exposure patterns must change too. Thus, a new block mask must be generated in accordance with the change. As explained above, electron beam exposure using a block mask lacks flexibility in comparison with direct electron beam exposure using a variable rectangular beam.
In summary, with conventional block exposure, a large number of block patterns is needed. These patterns have different details but a similar overall shape. As a result, the exposure time is too long even when block exposure is employed.